[{"content":"Team Contributor, IIT Gandhinagar \u0026amp; University of Edinburgh, Oct 2025 – Present\nThis project investigates how a network of CPUs can efficiently perform matrix multiplication tasks often handled by specialized hardware like GPUs.\n","date":"1 October 2025","externalUrl":null,"permalink":"/projects/wimpygpu/","section":"Projects","summary":"Team Contributor, IIT Gandhinagar \u0026 University of Edinburgh, Oct 2025 – Present\nThis project investigates how a network of CPUs can efficiently perform matrix multiplication tasks often handled by specialized hardware like GPUs.\n","title":"Distributing Matrix Multiplication over a Network of CPUs","type":"projects"},{"content":"Team Contributor at IIT Gandhinagar, Oct 2025 – Present\nInvestigating the usability challenges developers face when integrating Consent Management Platforms (CMPs) into web applications.\n","date":"1 October 2025","externalUrl":null,"permalink":"/projects/cmp-integration/","section":"Projects","summary":"Team Contributor at IIT Gandhinagar, Oct 2025 – Present\nInvestigating the usability challenges developers face when integrating Consent Management Platforms (CMPs) into web applications.\n","title":"Developer Experience of Consent Management Platform Integration","type":"projects"},{"content":"M.Tech. Thesis Work, Thesis PDF\nAdvisor: Prof. Abhishek Bichhawat, Co-advisor: Prof. Yuvraj Patel (The University of Edinburgh)\nDesigned high-performance faster data-parallel algorithms for large integer addition and subtraction using AVX512 for most cases. Achieved average execution-time speedup of 2.06x for addition and 2.32x for subtraction (up to 131k bits) compared to the GNU Multiple-Precision Arithmetic Library (GMP). Designed a faster Vedic-based multiplication algorithm for large integers using AVX512-IFMA for 256-bit operands, with execution-time speedup of 1.83x compared to the GMP library. Additionally, designed approximate variants of the proposed algorithms for large integer addition and multiplication, achieving average execution-time speedup of 2.52x and 2.80x, respectively, compared to GMP. ","date":"1 May 2024","externalUrl":null,"permalink":"/projects/large-integer-arithmetic/","section":"Projects","summary":"M.Tech. Thesis Work, Thesis PDF\n","title":"Accelerating Large Integer Arithmetic with Parallel Addition, Subtraction, and Vedic-Based Multiplication Using AVX512","type":"projects"},{"content":"M.Sc. Thesis Work, Thesis PDF\nAdvisor: Prof. Priya Ranjan Sinha Mahapatra, Co-advisor: Dr. Soumen Atta\nDesigned and implemented an algorithm for solving maximal covering location problems using genetic and artificial bee colony algorithms. Achieved optimal benchmark results with CPLEX in 50% of cases, reducing the average computational time to 85.83 seconds, compared to over 1000 seconds for previous models, with an average gap of just 0.01%. ","date":"1 May 2022","externalUrl":null,"permalink":"/projects/maximal-covering-location/","section":"Projects","summary":"M.Sc. Thesis Work, Thesis PDF\n","title":"Studies on Various Maximal Covering Location Problems using Genetic and Artificial Bee Colony Algorithms","type":"projects"},{"content":"B.Sc. Project Work, Project Report\nDesigned a multiplier accumulate unit using reversible gates for low power consumption and heat dissipation.\n","date":"1 May 2020","externalUrl":null,"permalink":"/projects/reversible-multiplier/","section":"Projects","summary":"B.Sc. Project Work, Project Report\n","title":"Reversible Multiplier Accumulate Unit","type":"projects"},{"content":"Team Contributor, GitHub\nEngineered an instant payment system using Parallel and Distributed Systems concepts. Facilitated seamless and secure interoperability between parties, similar to UPI. Implemented efficient transaction processing with load balancing, fault tolerance, and concurrency control to ensure high availability and scalability. ","date":"1 October 2023","externalUrl":null,"permalink":"/projects/instant-payment-gateway/","section":"Projects","summary":"Team Contributor, GitHub\n","title":"Instant Payment Gateway (IPG)","type":"projects"},{"content":"Individual Contributor, GitHub\nDeveloped a simulation of a tennis game matching server where multiple players send requests for games: singles, doubles, male, female, or mixed. Utilized OpenMP threads to handle client requests and MPI calls for player communication. Managed the availability of limited tennis courts (4 courts) to continuously match players\u0026rsquo; requests. Completed as part of the Parallel and Distributed Course at IIT Gandhinagar. ","date":"1 November 2023","externalUrl":null,"permalink":"/projects/tennisserve/","section":"Projects","summary":"Individual Contributor, GitHub\n","title":"TennisServe: A Parallel Game Matching Server with OpenMP \u0026 MPI","type":"projects"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/categories/","section":"Categories","summary":"","title":"Categories","type":"categories"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/tags/code-measurement/","section":"Tags","summary":"","title":"Code Measurement","type":"tags"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/tags/execution-time/","section":"Tags","summary":"","title":"Execution Time","type":"tags"},{"content":"I am a Director\u0026rsquo;s PhD Fellow in the Department of Computer Science and Engineering at the Indian Institute of Technology Gandhinagar, where I work with Prof. Abhishek Bichhawat and Prof. Yuvraj Patel. I am a member of the FUSS group and my current research explores better hardware utilization in modern compute infrastructure.\nMy broader research interests include CPU parallelism, compilers, distributed systems, and usable privacy \u0026amp; security.\n","date":"26 December 2025","externalUrl":null,"permalink":"/","section":"Home","summary":"I am a Director’s PhD Fellow in the Department of Computer Science and Engineering at the Indian Institute of Technology Gandhinagar, where I work with Prof. Abhishek Bichhawat and Prof. Yuvraj Patel. I am a member of the FUSS group and my current research explores better hardware utilization in modern compute infrastructure.\nMy broader research interests include CPU parallelism, compilers, distributed systems, and usable privacy \u0026 security.\n","title":"Home","type":"page"},{"content":"Measuring code performance accurately is crucial, especially when optimizing the existing algorithms or designing new ones. In this post, I\u0026rsquo;ll share my learnings of measuring code performance using various tools and techniques.\nFor measuring execution time, we can use the following techniques:\nWall Clock Time (clock_gettime) Linux resource usage metrics (getrusage) To measure raw Time Stamp Counter (or, ticks), on x86 architectures we can use:\nRDTSC (Read Time-Stamp Counter) Finally, to pinpoint performance bottlenecks, we can use the Linux perf tool; However, there are two ways to use it:\nperf Command line tool perf_event_open syscall for custom profiling code segments. We will explore each of these methods in detail, with the help of an example C code snippet that we will measure using these techniques. The naive function snippet we will use for measurement is as follows:\nint sum_of_two_arrays(int *array1, int *array2, int size) { int total_sum = 0; int sum1 = 0, sum2 = 0; for (int i = 0; i \u0026lt; size; i++) { sum1 += array1[i]; } for (int i = 0; i \u0026lt; size; i++) { sum2 += array2[i]; } total_sum = sum1 + sum2; return total_sum; } Wall Clock Time (clock_gettime) # The most popular way to measure code performance is by using wall clock time. The clock_gettime function in Linux provides wall-clock time measurements with nanosecond precision. It can be used to measure the elapsed time for a specific code segment. While there are multiple clock types available, CLOCK_MONOTONIC is generally preferred for measuring elapsed time as it is not affected by system time changes. To use clock_gettime, we have to include the \u0026lt;time.h\u0026gt; header file.\nUsage # // Include necessary headers and define variables struct timespec start, end; clock_gettime(CLOCK_MONOTONIC, \u0026amp;start); // Code segment to measure sum_of_two_arrays(array1, array2, size); clock_gettime(CLOCK_MONOTONIC, \u0026amp;end); long seconds = end.tv_sec - start.tv_sec; long nanoseconds = end.tv_nsec - start.tv_nsec; double elapsed = seconds + nanoseconds*1e-9; printf(\u0026#34;Elapsed time: %.9f seconds\\n\u0026#34;, elapsed); Output # Elapsed time: XXX getrusage # In linux systems, getrusage is a system call that provides resource usage statistics for the calling process. It is used to measure the resources used by the process, like CPU time, memory usage, etc. We used this system call to measure the CPU time used by our code. POSIX.1 specifies getrusage(), but specifies only the fields ru_utime and ru_stime. And, for our benchmarking purposes, we can use ru_utime and ru_stime to measure the user CPU time and system CPU time, respectively. The getrusage system call provides information about resource usage for a process, including user and system CPU time. The user CPU time represents the amount of CPU time spent in user mode, while the system CPU time represents the time spent in kernel mode. By measuring the user CPU time before and after executing a code segment, we can determine the CPU time consumed by that segment. To use getrusage, we need to include the \u0026lt;sys/resource.h\u0026gt; header file.\n// Function to measure CPU time in microseconds as a long double static inline long double cputime() { struct rusage rus; getrusage(RUSAGE_SELF, \u0026amp;rus); return rus.ru_utime.tv_sec * 1000000.0L + rus.ru_utime.tv_usec; } Usage # // Include necessary headers and define variables long double start_time, end_time, cpu_time_used; start_time = cputime(); // Code segment to measure sum_of_two_arrays(array1, array2, size); end_time = cputime(); cpu_time_used = end_time - start_time; printf(\u0026#34;CPU time used: %.3Lf microseconds\\n\u0026#34;, cpu_time_used); RDTSC # On the x86 architecture, the RDTSC (Read Time-Stamp Counter) instruction is a low-level way to measure the number of CPU ticks that have elapsed since the last reset. It provides a raw metric of code execution time, making it suitable for performance profiling. As RDTSC instruction measure the ticks that increments at a constant rate, regardless of CPU frequency scaling (e.g., Turbo Boost, power-saving states), the number of ticks per unit of real time will remain constant, even if the core\u0026rsquo;s clock speed changes. However, it is well-known that RDTSC does not provide accurate measurements in cases of code cross-contamination due to out-of-order execution. A white paper by Intel that explains how to measure ticks accurately using a combination of CPUID, RDTSC, and RDTSCP instructions. You can find the white paper here: How to Benchmark Code Execution Times on Intel® IA-32 and IA-64 Instruction Set Architectures. RDTSCP mitigates some of the out-of-order execution issues by serializing the instruction stream before reading the time-stamp counter. The reason of using CPUID instruction (which generates an interrupt) before and after RDTSC/RDTSCP is to serialize the instruction stream, ensuring that all previous instructions have completed before reading the time-stamp counter. This helps to get a more accurate measurement of the code segment.\nstatic inline unsigned long long measure_rdtsc_start() { unsigned cycles_low, cycles_high; unsigned long long ticks; asm volatile(\u0026#34;CPUID\\n\\t\u0026#34; \u0026#34;RDTSC\\n\\t\u0026#34; \u0026#34;mov %%edx, %0\\n\\t\u0026#34; \u0026#34;mov %%eax, %1\\n\\t\u0026#34; : \u0026#34;=r\u0026#34;(cycles_high), \u0026#34;=r\u0026#34;(cycles_low)::\u0026#34;%rax\u0026#34;, \u0026#34;%rbx\u0026#34;, \u0026#34;%rcx\u0026#34;, \u0026#34;%rdx\u0026#34;); ticks = (((unsigned long long)cycles_high \u0026lt;\u0026lt; 32) | cycles_low); return ticks; } // Inline function for measuring rdtscp ticks static inline unsigned long long measure_rdtscp_end() { unsigned cycles_low, cycles_high; unsigned long long ticks; asm volatile(\u0026#34;RDTSCP\\n\\t\u0026#34; \u0026#34;mov %%edx, %0\\n\\t\u0026#34; \u0026#34;mov %%eax, %1\\n\\t\u0026#34; \u0026#34;CPUID\\n\\t\u0026#34; : \u0026#34;=r\u0026#34;(cycles_high), \u0026#34;=r\u0026#34;(cycles_low)::\u0026#34;%rax\u0026#34;, \u0026#34;%rbx\u0026#34;, \u0026#34;%rcx\u0026#34;, \u0026#34;%rdx\u0026#34;); ticks = (((unsigned long long)cycles_high \u0026lt;\u0026lt; 32) | cycles_low); return ticks; } Usage # // Include necessary headers and define variables unsigned long long start_ticks, end_ticks, ticks_taken; start_ticks = measure_rdtsc_start(); sum = 0; for (int i = 0; i \u0026lt; 10000; i++) { sum += sum_of_two_arrays(array1, array2, N); } end_ticks = measure_rdtscp_end(); ticks_taken = end_ticks - start_ticks; printf(\u0026#34;Ticks taken: %llu\\n\u0026#34;, ticks_taken); Accuracy Considerations # The actual elapsed time will vary based on system load and other factors like CPU frequency scaling, context switching, etc. To get more accurate measurements, consider measuring the code segment multiple times \u0026mdash; create CDF plots to visualize the distribution of execution times or use statistical measures like 95% CI (Confidence Interval) mean to report the results. For execution time measurements, it\u0026rsquo;s also important to minimize the impact of other processes running on the system. Running the measurements on a dedicated machine or using CPU affinity to bind the process to a specific core can help reduce variability.\nI personally prefer averaging strategy of GMPBench to report the mean execution time of a given function. What it does is, it starts with a single iteration of the function and doubles the number of iterations until the total elapsed time exceeds a predefined threshold (e.g., 250 ms). Once the threshold is reached, it calculates the average time per iteration by dividing the total elapsed time by the number of iterations. This approach helps to ensure that the measurements are less affected by transient system load variations. Further, based on this computed mean time, it calculates throughput (operations per second) and reports that as the final performance metric.\nOriginally, GMPBench was designed to benchmark arbitrary-precision arithmetic operations in the GMP library, but the underlying methodology can be applied to measure the performance of any function or code segment.\nBelow you can find three different adapted macros of GMPBench style averaging strategy to measure execution time using clock_gettime, RDTSC, and getrusage respectively.\nWhenever I report timing numbers, I prefer to run the GMPBench style averaging strategy for 20-30 times and report the 95% CI mean of the execution time or throughput numbers.\nLinux perf # The \u0026lsquo;perf\u0026rsquo; tool in Linux is a powerful performance analysis tool that can measure various aspects of code performance, including CPU cycles, cache misses, and more. It provides a wealth of information but can be complex to use effectively.\nIn conclusion, accurately measuring code performance requires a combination of tools and techniques. By understanding the strengths and weaknesses of each method, you can gain valuable insights into your code\u0026rsquo;s performance and identify areas for optimization.\n","date":"26 December 2025","externalUrl":"https://iitgn-fuss.github.io/interesting-reads/measure-your-code/","permalink":"/posts/measure-your-code/","section":"Posts","summary":"Measuring code performance accurately is crucial, especially when optimizing the existing algorithms or designing new ones. In this post, I’ll share my learnings of measuring code performance using various tools and techniques.\nFor measuring execution time, we can use the following techniques:\nWall Clock Time (clock_gettime) Linux resource usage metrics (getrusage) To measure raw Time Stamp Counter (or, ticks), on x86 architectures we can use:\nRDTSC (Read Time-Stamp Counter) Finally, to pinpoint performance bottlenecks, we can use the Linux perf tool; However, there are two ways to use it:\n","title":"How to Measure Performance of Your Code","type":"posts"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/tags/performance/","section":"Tags","summary":"","title":"Performance","type":"tags"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/posts/","section":"Posts","summary":"","title":"Posts","type":"posts"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/tags/profiling/","section":"Tags","summary":"","title":"Profiling","type":"tags"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/categories/systems/","section":"Categories","summary":"","title":"Systems","type":"categories"},{"content":"","date":"26 December 2025","externalUrl":null,"permalink":"/tags/","section":"Tags","summary":"","title":"Tags","type":"tags"},{"content":"Hello! You\u0026rsquo;re in the gallery section of my website. Here, I\u0026rsquo;ve shared some of the moments related to my academic journey, conferences, teaching, and some other memories.\nI\u0026rsquo;ve categorized them into few sections for easy navigation.\n","date":"4 November 2025","externalUrl":null,"permalink":"/gallery/","section":"Gallery","summary":"Hello! You’re in the gallery section of my website. Here, I’ve shared some of the moments related to my academic journey, conferences, teaching, and some other memories.\nI’ve categorized them into few sections for easy navigation.\n","title":"Gallery","type":"gallery"},{"content":" Computer Systems Workshop at IISc Bangalore (30-31 October 2025, Bangalore, India) # We attended the invite-only Computer Systems Workshop held at IISc Bangalore on 30-31 October 2025. I presented a poster there. Below are few pictures from those two days.\n","date":"4 November 2025","externalUrl":null,"permalink":"/gallery/workshops/","section":"Gallery","summary":"Computer Systems Workshop at IISc Bangalore (30-31 October 2025, Bangalore, India) # We attended the invite-only Computer Systems Workshop held at IISc Bangalore on 30-31 October 2025. I presented a poster there. Below are few pictures from those two days.\n","title":"Workshops","type":"gallery"},{"content":"Presented poster on our work on \u0026ldquo;Accelerating Large Integer Arithmetic with Parallel Addition, Subtraction, and Vedic-Based Multiplication Using AVX512\u0026rdquo; at the Computer Systems Workshop held at IISc Bangalore.\nGallery\n","date":"31 October 2025","externalUrl":null,"permalink":"/updates/iisc-poster/","section":"Updates","summary":"Presented poster on our work on “Accelerating Large Integer Arithmetic with Parallel Addition, Subtraction, and Vedic-Based Multiplication Using AVX512” at the Computer Systems Workshop held at IISc Bangalore.\nGallery\n","title":"Presented Poster at IISc Bangalore","type":"updates"},{"content":"","date":"31 October 2025","externalUrl":null,"permalink":"/updates/","section":"Updates","summary":"","title":"Updates","type":"updates"},{"content":"","date":"1 October 2025","externalUrl":null,"permalink":"/tags/cpu-parallelism/","section":"Tags","summary":"","title":"CPU Parallelism","type":"tags"},{"content":"","date":"1 October 2025","externalUrl":null,"permalink":"/tags/distributed-systems/","section":"Tags","summary":"","title":"Distributed Systems","type":"tags"},{"content":"","date":"1 October 2025","externalUrl":null,"permalink":"/tags/matrix-multiplication/","section":"Tags","summary":"","title":"Matrix Multiplication","type":"tags"},{"content":"","date":"1 October 2025","externalUrl":null,"permalink":"/projects/","section":"Projects","summary":"","title":"Projects","type":"projects"},{"content":"","date":"1 October 2025","externalUrl":null,"permalink":"/tags/usable-privacy-and-security/","section":"Tags","summary":"","title":"Usable Privacy and Security","type":"tags"},{"content":"","date":"1 October 2025","externalUrl":null,"permalink":"/tags/web-security/","section":"Tags","summary":"","title":"Web Security","type":"tags"},{"content":"Organized web security CTFs for ICAN Faculty Development Program on Cybersecurity at IIT Madras.\nLinkedIn Post\n","date":"15 July 2025","externalUrl":null,"permalink":"/updates/ican-ctf/","section":"Updates","summary":"Organized web security CTFs for ICAN Faculty Development Program on Cybersecurity at IIT Madras.\nLinkedIn Post\n","title":"Organized Cyber Security CTF at ICAN FDP, IIT Madras","type":"updates"},{"content":"Here are some memories during my M.Tech at IIT Gandhinagar.\nConvocation - Class of 2025 # Party thrown by our Advisor # Mt. Abu Trip'25 # K-153 # Patil\u0026rsquo;s Room # Pratyush and Me (During Udaan) # Post Patil\u0026rsquo;s Birthday Celebration # Coffee Cup at my workspace # E-306 Desk # Director\u0026rsquo;s Dinner Selfie # Blithchron'25 # Post Blithchron'25 # ","date":"30 June 2025","externalUrl":null,"permalink":"/gallery/mtech-memories-iitgn/","section":"Gallery","summary":"Here are some memories during my M.Tech at IIT Gandhinagar.\nConvocation - Class of 2025 # Party thrown by our Advisor # ","title":"Some memories during my M.Tech at IIT Gandhinagar","type":"gallery"},{"content":"Below you may find some of the conferences I have attended over the years (as of now, only one).\nBuildSEC'24 (19-20 December 2024, New Delhi, India) # This is my first-ever publication as well as my first-ever conference attended. I presented our work on \u0026ldquo;Online Authentication Habits of Indian Users\u0026rdquo; at BuildSEC'24, Building a Secure \u0026amp; Empowered Cyberspace, held on 19-20 December 2024 in New Delhi, India. ","date":"3 February 2025","externalUrl":null,"permalink":"/gallery/conferences/","section":"Gallery","summary":"Below you may find some of the conferences I have attended over the years (as of now, only one).\nBuildSEC'24 (19-20 December 2024, New Delhi, India) # This is my first-ever publication as well as my first-ever conference attended. I presented our work on “Online Authentication Habits of Indian Users” at BuildSEC'24, Building a Secure \u0026 Empowered Cyberspace, held on 19-20 December 2024 in New Delhi, India. ","title":"Conferences","type":"gallery"},{"content":"Let\u0026rsquo;s take a look at the beautiful IIT Gandhinagar campus through my lens.\nIIT Gandhinagar Campus (2023-2025) # These are taken during my stay at IIT Gandhinagar from 2023 to 2025 for my M.Tech degree.\nGreen Campus # Sunset # Cotton Sky # Sports Track # Cricket Ground # Night # ","date":"3 February 2025","externalUrl":null,"permalink":"/gallery/iit-gandhinagar-campus/","section":"Gallery","summary":"Let’s take a look at the beautiful IIT Gandhinagar campus through my lens.\nIIT Gandhinagar Campus (2023-2025) # These are taken during my stay at IIT Gandhinagar from 2023 to 2025 for my M.Tech degree.\nGreen Campus # ","title":"IIT Gandhinagar Campus","type":"gallery"},{"content":"Below you may find some of the teaching activities I have been involved in over the years (as of now, only one).\nCode Profiling and Optimization (November 2024) # This was a Student-Run Short Course on Code Profiling and Optimization conducted at IIT Gandhinagar during my final-year of M.Tech. I was principal instructor for the course along with my batchmate Pratyush Choudhary, who was the co-instructor. ","date":"3 February 2025","externalUrl":null,"permalink":"/gallery/teaching/","section":"Gallery","summary":"Below you may find some of the teaching activities I have been involved in over the years (as of now, only one).\nCode Profiling and Optimization (November 2024) # This was a Student-Run Short Course on Code Profiling and Optimization conducted at IIT Gandhinagar during my final-year of M.Tech. I was principal instructor for the course along with my batchmate Pratyush Choudhary, who was the co-instructor. ","title":"Teaching","type":"gallery"},{"content":"Let\u0026rsquo;s take a look at a few shots of my alma mater, the University of Kalyani. These are taken at the university from 2021 to 2023 during my M.Sc degree.\nPictures with Faculty Members # Dept. of CSE Building # View from rooftop of Dept. Building # Campus Tour Video # This was captured by my friend Pranab while I was riding the bike on a monsoon day at the University of Kalyani. Play it in 4K and enjoy the lush green campus! (You can also try 2x speed for a quick tour) Random Shot # ","date":"3 February 2025","externalUrl":null,"permalink":"/gallery/university-of-kalyani/","section":"Gallery","summary":"Let’s take a look at a few shots of my alma mater, the University of Kalyani. These are taken at the university from 2021 to 2023 during my M.Sc degree.\nPictures with Faculty Members # Dept. of CSE Building # ","title":"University of Kalyani","type":"gallery"},{"content":"Selected for the Director\u0026rsquo;s PhD Fellowship at the IIT Gandhinagar.\n","date":"15 January 2025","externalUrl":null,"permalink":"/updates/phd-fellowship/","section":"Updates","summary":"Selected for the Director’s PhD Fellowship at the IIT Gandhinagar.\n","title":"Director's PhD Fellowship","type":"updates"},{"content":"Attended BuildSEC'24 in New Delhi and presented our work on \u0026ldquo;Online Authentication Habits of Indian Users\u0026rdquo;. We also won the Best Paper Award there!\nLinkedIn Post\n","date":"20 December 2024","externalUrl":null,"permalink":"/updates/buildsec-award/","section":"Updates","summary":"Attended BuildSEC'24 in New Delhi and presented our work on “Online Authentication Habits of Indian Users”. We also won the Best Paper Award there!\nLinkedIn Post\n","title":"Best Paper Award at BuildSEC'24","type":"updates"},{"content":"Pratyush Choudhary, Subhrajit Das, Mukul Paras Potta, Prasuj Das, and Abhishek Bichhawat\n1st International Conference on Building a Secure and Empowered Cyberspace (BuildSec) New Delhi, India, December 2024\nIEEE Xplore\n","date":"1 December 2024","externalUrl":"https://ieeexplore.ieee.org/document/10874330","permalink":"/publications/online-authentication-habits/","section":"Publications","summary":"Pratyush Choudhary, Subhrajit Das, Mukul Paras Potta, Prasuj Das, and Abhishek Bichhawat\n1st International Conference on Building a Secure and Empowered Cyberspace (BuildSec) New Delhi, India, December 2024\nIEEE Xplore\n","title":"Online Authentication Habits of Indian Users","type":"publications"},{"content":"","date":"1 December 2024","externalUrl":null,"permalink":"/tags/password-managers/","section":"Tags","summary":"","title":"Password Managers","type":"tags"},{"content":"","date":"1 December 2024","externalUrl":null,"permalink":"/publications/","section":"Publications","summary":"","title":"Publications","type":"publications"},{"content":"","date":"1 December 2024","externalUrl":null,"permalink":"/tags/two-factor-authentication/","section":"Tags","summary":"","title":"Two-Factor Authentication","type":"tags"},{"content":"","date":"6 October 2024","externalUrl":null,"permalink":"/search/","section":"Search","summary":"","title":"Search","type":"search"},{"content":"","date":"1 May 2024","externalUrl":null,"permalink":"/tags/large-number-arithmetic/","section":"Tags","summary":"","title":"Large-Number Arithmetic","type":"tags"},{"content":"","date":"1 May 2024","externalUrl":null,"permalink":"/tags/scientific-computing/","section":"Tags","summary":"","title":"Scientific Computing","type":"tags"},{"content":"","date":"1 May 2024","externalUrl":null,"permalink":"/tags/simd/","section":"Tags","summary":"","title":"SIMD","type":"tags"},{"content":"","date":"1 November 2023","externalUrl":null,"permalink":"/tags/parallel-programming/","section":"Tags","summary":"","title":"Parallel Programming","type":"tags"},{"content":"","date":"1 October 2023","externalUrl":null,"permalink":"/tags/payment-gateway/","section":"Tags","summary":"","title":"Payment Gateway","type":"tags"},{"content":"","date":"1 May 2022","externalUrl":null,"permalink":"/tags/combinatorial-optimization/","section":"Tags","summary":"","title":"Combinatorial Optimization","type":"tags"},{"content":"","date":"1 May 2022","externalUrl":null,"permalink":"/tags/metaheuristics/","section":"Tags","summary":"","title":"Metaheuristics","type":"tags"},{"content":"","date":"1 May 2022","externalUrl":null,"permalink":"/tags/operations-research/","section":"Tags","summary":"","title":"Operations Research","type":"tags"},{"content":"","date":"1 May 2022","externalUrl":null,"permalink":"/tags/swarm-intelligence/","section":"Tags","summary":"","title":"Swarm Intelligence","type":"tags"},{"content":"","date":"1 May 2020","externalUrl":null,"permalink":"/tags/hardware-architecture/","section":"Tags","summary":"","title":"Hardware Architecture","type":"tags"},{"content":"","date":"1 May 2020","externalUrl":null,"permalink":"/tags/reversible-computing/","section":"Tags","summary":"","title":"Reversible Computing","type":"tags"},{"content":"","externalUrl":null,"permalink":"/authors/","section":"Authors","summary":"","title":"Authors","type":"authors"},{"content":"","externalUrl":null,"permalink":"/series/","section":"Series","summary":"","title":"Series","type":"series"}]