Thesis and Research Projects
DigitsOnTurbo: Accelerating Large Integer Arithmetic with Parallel Addition, Subtraction, and Vedic-Based Multiplication Using AVX512 (M.Tech. Thesis)
IIT Gandhinagar, Jan 2024 - Apr 2025
Individual Contributor, M.Tech. Thesis Work
Advisor: Prof. Abhishek Bichhawat, Co-advisor: Prof. Yuvraj Patel (The University of Edinburgh)
(View Thesis)
- Designed high-performance faster data-parallel algorithms for large integer addition and subtraction using AVX512 for most cases.
- Achieved average execution-time speedup of 2.06x for addition and 2.32x for subtraction (up to 131k bits) compared to the GNU Multiple-Precision Arithmetic Library (GMP).
- Designed a faster Vedic-based multiplication algorithm for large integers using AVX512-IFMA for 256-bit operands, with execution-time speedup of 1.83x compared to the GMP library.
- Additionally, designed approximate variants of the proposed algorithms for large integer addition and multiplication, achieving average execution-time speedup of 2.52x and 2.80x, respectively, compared to GMP.
Studies on Various Maximal Covering Location Problems using Genetic and Artificial Bee Colony Algorithms (M.Sc. Thesis)
University of Kalyani, Sep 2022 - Jun 2023
Individual Contributor, M.Sc. Thesis Work
Advisor: Prof. Priya Ranjan Sinha Mahapatra, Co-advisor: Dr. Soumen Atta
(View Thesis)
- Designed and implemented an algorithm for solving maximal covering location problems using genetic and artificial bee colony algorithms.
- Achieved optimal benchmark results with CPLEX in 50% of cases, reducing the average computational time to 85.83 seconds, compared to over 1000 seconds for previous models, with an average gap of just 0.01%.
Reversible Multiplier Accumulate Unit (B.Sc. Project)
Panihati Mahavidyalaya, Jan 2021 - Aug 2021
Team Contributor, B.Sc. Thesis Work
Advisor: Prof. Biswanath Sen
(View Project Report)
- Designed a multiplier accumulate unit using reversible gates for low power consumption and heat dissipation.
Other Projects
Organizational Impact of Security Features on Email Accounts
IIT Gandhinagar, Jan 2025 - Present
Co-Investigator
Principal Investigator: Prof. Abhishek Bichhawat
- Ongoing project investigating the impact of security features on the usability of organizational email systems.
- Focuses on user behavior in response to changes in organizational policies, particularly within academic institutions.
Instant Payment Gateway (IPG)
IIT Gandhinagar, Feb 2024 - April 2024
Team Contributor
(Project Link)
- Engineered an instant payment system using Parallel and Distributed Systems concepts.
- Facilitated seamless and secure interoperability between parties, similar to UPI.
- Implemented efficient transaction processing with load balancing, fault tolerance, and concurrency control to ensure high availability and scalability.
TennisServe: A Parallel Game Matching Server with OpenMP & MPI
IIT Gandhinagar, Jan 2024 - April 2024
Individual Contributor
(Project Link)
- Developed a simulation of a tennis game matching server where multiple players send requests for games: singles, doubles, male, female, or mixed.
- Utilized OpenMP threads to handle client requests and MPI calls for player communication.
- Managed the availability of limited tennis courts (4 courts) to continuously match players’ requests.
- Completed as part of the Parallel and Distributed Course at IIT Gandhinagar.